An effective cell-balancing algorithm during both charge and discharge phases is presented. This charger can be used either as a standalone application to charge a battery pack with two serial connected Li-Ion/Li-Pol batteries or embedded in residential, office, and industrial applications. Introduction A modern portable system requires more operating voltage than a single-cell Lithium-ion (Li-Ion) or Lithium-polymer (Li- Pol) battery can provide. A serial connection results in a pack voltage eq

Kit Includes: • PSoCEvalUSB Board • LCD Module • MiniProg1 programmer • USB mini cable • Documentation and Soft ware 428-1650-ND Evaluation Kit for CY8C24794-24LFXI ................................................. $98.99 CapSense™ Express Evaluation Kits The CapSense Express evaluation kits enable designers to replace mechanical buttons by implementing touch sensing designs in minutes with the newest CapSense Touch Sensing Family, CapSense Express. With Cypress’s PSoC Express™ visual embedded s

This kit contains a complete PSoC Express development environment including a large, full featured development board, fan modules, proto modules, 28-DIP samples, and a MiniProg Programmer. CY3235-PROXDET: The CapSense Proximity Detection Demonstration Kit allows quick and easy demonstration of a PSoC® CapSense-enabled device (CY8C21434) to accurately sense the proximity of a hand or finger along the Kit Includes: • Development Board • Four Fan Modules • Two Proto Modules • MiniProg Insystem leng

It also offers a breadboard module and a module for implementing up to five buttons and a slider with sample overlays to encompass a wide variety of designs. Kit Includes: • Universal Capsense Controller Boards • CapSense Linear Slider Module • CapSense Protyping Module • CY3240-I2USB Board • CY3210 MiniProg1 Programmer • Software 428-2033-ND Universal CapSense Controller Kit ................................................... $177.00 PSoC® I2C to USB Bridge Kit CY3240-I2USB: The I2C to USB Brid

Low power, 350 nA RTC current . Capacitor or battery backup for RTC ¦ Watchdog timer ¦ Clock alarm with programmable interrupts ¦ Hands off automatic STORE on power down with only a small capacitor ¦ STORE to QuantumTrap™ initiated by software, device pin, or on power down ¦ RECALL to SRAM initiated by software or on power up ¦ Infinite READ, WRITE, and RECALL cycles ¦ High reliability . Endurance to 200K cycles . Data retention: 20 years at 55°C ¦ Single 3V operation with tolerance of +20%, –10

There is no direct pin for pin replacement for the CY2907. The CY22392 is the closest match in functionality to the CY2907. Introduction The CY22381, shown in Figure 1, is programmed using CyClocks RT that is part of the CyberClocks software suite. The CY2071A, shown in Figure 2, and CY2907 family of devices are programmed using the PC driven CyClocks software that is also part of the CyberClocks software suite. CyClocks software stores the program file as an entry file that uses a text file wit

XBUF CPLL SPLL UPLL OSC. CPUCLK CLKA CLKB CLKC CLKD MUX OE CLKF /1,2,4 /1,2,3,4,5,6 /8,10,12,13 /20,24,26,40/48,52,96,104 /2,3,4 /1,2,4,8 (8 BIT) (8 BIT) (10 BIT) Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Document #: 38-07189 Rev. *C Revised September 16, 2008 [+] Feedback CY2291 Pinouts Pin Definitions Figure 1. CY2291- 20-pin SOIC 32XOUT 32K CLKC VDD GND XTALIN XTALOUT XBUF CLKD CPUCLK 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 32XI

*B Revised October 26, 2005 [+] Feedback CY25566 Pin Description Pin Name Type Description 1 XIN/CLKIN I Clock or Crystal connection input. Refer to Table 1, Table 2, and Table 3 for input frequency range selection. 2 REFOFF I Input pin enables REFOUT clock at pin 3. REFOFF 400K. internal pull-up resistor. Logic “0” enables REFOUT, logic “1” disables REFOUT. Default = disabled. 3 REFOUT O Buffered, non-modulated output clock derived from XIN/CLKIN input frequency. There is a 180° phase shift fro

. *B Revised April 11, 2006 [+] Feedback CY25818/19 . Pin Description Pin Name Description 1 XIN/CLK Clock, Crystal, or Ceramic Resonator Input Pin. 2 Vss Power Supply Ground. 3 S0 Digital Spread% Control Pin. 3-Level input (H-M-L). Default = M. 4 SSCLK Modulated Spread Spectrum Output Clock. The output frequency is referenced to input frequency. Refer to Table 2 for the amount of modulation (Spread%). 5 REFCLK Unmodulated Reference Clock Output. The unmodulated output frequency is the same as t

–65°C to + 150°C Input Voltage Relative to Vdd:.............................. Vdd + 0.3V Table 4. DC Electrical Characteristics Vdd = 3.3V ±10%, TA = 0°C to +70°C and CL = 15 pF (unless otherwise noted) Parameter Description Conditions Min. Typ. Max. Unit Vdd Power Supply Range 2.97 3.3 3.63 V VINH Input HIGH Voltage S0 Input 0.85 Vdd Vdd Vdd V VINM Input MIDDLE Voltage S0 Input 0.40 Vdd 0.50 Vdd 0.60 Vdd V VINL Input LOW Voltage S0 Input 0.0 0.0 0.15 Vdd V VOH1 Output HIGH Voltage IOH = 4 ma, S