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Anleitung Epson, modell RX-8564LC

Hersteller: Epson
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Anleitung Zusammenfassung


(10) Changing the TE bit value from "1" to 0" stops the fixed-cycle timer's function (stops the countdown). Page . 24 ETM12E-01 RX . 8564 LC 13.3. Alarm Interrupt Function The alarm interrupt generation function generates interrupt events for alarm settings such as date, day, hour, and minute settings. When an interrupt event occurs, the AF bit value is set to "1" and the /INT pin goes to low level to indicate that an event has occurred. . When an alarm interrupt event occurs, low-level output from /AIRQ is not automatically reset (it can be reset only intentionally) and the low-level status of /AIRQ is retained. .Example of /INT operation AIE ="1" ( AF = "0" > "1" ) AF = "1" > "0" or AIE= "1" > "0" 13.3.1. Diagram of alarm interrupt function AIE bit /INT output AF bit Event occurs " 1 " " 0 " Hi -z " L " " 1 " " 0 " RTC internal operation Write operation (1) (2) (3) (4) " 1 " (5) (7) (6) (1) The minute, hour, day of week (weekday), and date at which an alarm interrupt event will occur is set in advance, and the interrupt event occurs when the current time matches this pre-set time. (2) When a time alarm interrupt event occurs, the AF bit values becomes "1". (3) When the AF bit = "1", its value is retained until it is cleared to zero. (4) If AIE = "1" when an alarm interrupt occurs, the /INT pin output goes low. . When an alarm interrupt event occurs, /INT pin output goes low, and this status is then held until it is cleared via the AF bit or AIE bit. (5) If the AIE value is changed from "1" to "0" while /INT is low, the /INT status immediately changes from low to Hi- z. . After the alarm interrupt occurs and before the AF bit value is cleared to zero, the /INT status can be controlled via the AIE bit. (6) If the AF bit value is changed from "1" to "0" while /INT is low, the /INT status immediately changes from low to Hi-z. (7) If the AIE bit value is "0" when an alarm interrupt occurs, the /INT pin status remains Hi-z. Page . 25 ETM12E-01 RX . 8564 LC 13.3.2. Alarm interrupt function registers bit 0 TIE 1 1 1 1 1 1 1 1 . Before entering settings for operations, we recommend writing a "0" to the AIE bit to prevent hardware interrupts from occurring inadvertently while entering settings. 1) Alarm registers ( Reg . 09 [h] to 0C [h] ) The hour, minute, date or day when an alarm interrupt event will occur is set using this register and the AE bit. When the settings made in the alarm registers match the current time, the AF bit value is changed to "1". At that time, if the AIE bit value has already been set to "1", the /INT pin goes low. • AE bit .1) When the AE bit value is "1", the data concerning the setting in question is ignored and is not subject to any comparison that would trigger an alarm interrupt. To exclude a setting from possibly triggering an alarm interrupt, write "1" to the AE bit in the register corresponding to the setting in question. (Example) To leave [hour], [minute], and [day of week (weekday)] settings as possible alarm interrupt triggers while excluding only the [day] setting from being a possible alarm interrupt trigger: > Write 80h (AE = "1") to the register used for the [day] setting register (the DAY Alarm register, (Reg . 0B[h])). .2) If all four AE bits have a value of "1", no alarm interrupt events will occur. 2) AF bit ( Alarm Flag ) This is a flag bit that retains the result when an alarm interrupt event has been detected. When this flag bit value is already set to "0", occurrence of an alarm interrupt event changes it to "1". Description The AF bit is cleared to zero to prepare for the next status detection . Clearing this bit to zero enables /AIRQ low output to be canceled (/AIRQ remains Hi-Z) when an alarm interrupt event has occurred. This bit is invalid after a "1" has been written to it. Alarm interrupt events are not detected. Alarm interrupt events are detected. . Result is retained until this bit is cleared to zero. Page . 26 ETM12E-01 RX . 8564 LC 3) AIE bit ( Alarm Interrupt Enable ) This bit is used to control interrupt signal output from the /INT pin when an alarm interrupt event has occurred. Writing "1" to this bit causes a low-level interrupt signal to be output from the /INT pin when an interrupt event occurs. When a "0" is written to this bit, output from the /INT pin is prohibited (disabled). Description 1 ) When an alarm interrupt event occurs, an interrupt signal is not generated or is canceled (/INT status remains Hi-z). 2 ) When an alarm interrupt event occurs, the interrupt signal is canceled (/INT status changes from low to Hi-z). When an alarm interrupt event occurs, an interrupt signal is generated (/INT status changes from Hi-z to low). . If the AIE bit value is changed from "0" to "1" without first canceling an interrupt event (i.e., if the AF bit value remains "1"), the /INT pin is immediately set to low level ("L"). . To detect when an alarm interrupt event has occurred without having to set the /INT pin to low level, monitor the AF bit value (to s...


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