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Dieses Gerät hat auch andere Anweisungen:
Anleitung Zusammenfassung
Mantissas
are
represen
ted
in
normalized
form.
That
is,
the
leading
one
is
stripp
ed
and
binary
p oint
is
not
explicitly
expressed.
Eac
h
expressed
man
tissa,
then,
has
an
implied
leading
one
and
binary
p oint.
F
or
example,
a
man
tissa
represen
ted
b
y
10101010101010101010101
is
in
terpreted
as
the
v
alue
1.10101010101010101010101.
The
exp onen
ts
of
real
n
um
b ers
are
biased.
This
means
that
b oth
p ositiv e
and
negative
true
exp onents
are
represen
ted
using
only
unsigned
binary
in
tegers.
The
bias
amoun
t,
or
excess,
is
the
dierence
b et
w
een
the
true
exp onen
t
and
the
represen
ted
exp onen
t.
The
negative
true
exp onen
ts
corresp ond
to
the
low
er
range
of
the
represen
ted
exp onen
ts.
The
p ositiv e
true
exp onen
ts
corresp ond
to
the
upp er
range
of
the
represen
ted
exp onents.
The
true
exp onen
t
zero
corresp onds
to
the
midp oint
in
the
range
of
the
represen
ted
exp onents.
F
or
example,
consider
an
exp onen
t
eld
n
bits
long
where
the
true
exp onen
t
is
T
,
the
represen
ted
exp onen
t
is
E
,
and
the
bias
T
E 0b
E
T
+b
is
b
.
F
or
an
y
real
n
um
b er
x
,
then,
x
=
x
,
and
x
=
x
.
Exp onen
t
elds
of
all
zeros
or
all
ones
are
reserv
ed.
If
the
exp onent
of
a
oating-p
oint
n
um
b er
is
all
zeros
and
the
man
tissa
is
zero,
the
n
um
b er
is
regarded
as
zero.
If
the
exp onen
t
of
a
oating-p
oint
n
um
b er
is
all
zeros
and
the
man
tissa
is
not
all
zero,
the
n
um
b er
is
regarded
as
denormalized.
If
the
exp onen
t
of
a
oating-p
oint
n
um
b er
is
all
ones
and
the
man
tissa
is
zero,
the
n
um
b er
is
regarded
as
a
signed
innit
y
.
If
the
exp onen
t
is
all
ones
and
the
man
tissa
is
not
zero,
the
in
terpretation
is
NaN
(Not-a-Numb er,
undened).
If
an
y
pro cess
attempts
to
op erate
on
an
innit
y
or
a
NaN,
a
system
trap
may
o ccur
and
data
may
b e
corrupted.
In
v
alid
op eration
is
signaled
when
the
source
is
a
signaling
or
a
quiet
NaN.
The
result
is
the
destination
format's
largest
nite
n
um
b er
with
the
sign
of
the
source.
An
y
op eration
that
in
v
olv
es
a
signaling
NaN
or
in
v
alid
op eration
returns
a
quiet
NaN
as
the
result
when
no
trap
o ccurs
and
a
oating-p
oint
result
is
to
b e
deliv
ered.
If
an
op eration
is
using
one
or
t
w
o
quiet
NaNs
as
input,
it
signals
no
exception;
ho
w
ev
er,
if
a
oating-p
oint
result
is
to
b e
deliv
ered,
a
quiet
NaN
is
returned
that
is
the
same
as
one
of
the
input
NaNs.
IEEE
Real
Number
Format.
IEEE
n
um
b ers
conform
to
the
format
set
up
b
y
the
Institute
of
Electrical
and
Electronics
Engineers
and
the
American
National
Standards
Institute
(std
754-1985).
Single-precision
n
um
b ers
are
one
NM
w
ord,
aligned
on
32-bit
b oundaries.
Double
precision
n
um
b ers
are
t
w
o
NM
w
ords,
aligned
on
64-bit
b oundaries.
In
this
man
ual,
bit
elds
are
describ ed
as
( bit
: length
),
where
bit
is
Note
the
rst
bit
in
the
eld
and
length
is
the
n
um
b er
of
consecutiv
e
bits
in
the
eld.
F
or
example,
\bits
(11:3)"
refers
to
bits
11,
12,
and
13.
Bit
0
is
the
most
signicant
bit.
Formatting
Data
Types
2-9
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