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Populate R406 and R407 with 0 . resistors and remove R415 and R416 to disconnect the default clock path inputs. In addition, populate C405 and C406 with a 0.1 .F capacitor and remove C409 and C410 to disconnect the default clock path outputs. The AD9515 has many pin- strappable options that are set to a default mode of operation. Consult the AD9515 data sheet for more information about these and other options. PDWN To enable the power-down feature, short P303 to the on position (AVDD) on the PDWN pin. STBY To enable the standby feature, short P302 to the on position (AVDD) on the STBY pin. GAIN+, GAIN. To change the VGA attenuation, drive the GAIN+ pin from 0 V to 1.6 V on J302 using a linear supply and use a single-ended method to change the VGA gain from 0 dB to 42 dB. U403 is available for users who wish to drive the gain pins (GAIN±) differentially. Install R305, R347, and R349 and remove C308, C309, and R303 to connect the amplifier correctly. Next, apply a dc voltage source to P601, connecting the +5 V, .5 V, and ground (0 V) appropriately to bias U403 (AD8138). These benchtop linear supplies should each have 100 mA of current capability. If an external source is not available, R337 can be installed to use the on-board resistive divider for gain adjustment in either the single-ended or differential case. Non-SPI Mode For users who wish to operate the DUT without using SPI, remove the jumpers on J601. This disconnects the CSB, SCLK, and SDIO pins from the control bus, allowing the DUT to operate in its simplest mode. Each of these pins has internal termination and will float to its respective level. Note that the device will only work in its default condition. CWDx+, CWDx. To use the CWDx± outputs, first apply a dc voltage source to P601, connecting the +5 V, .5 V, and ground (0 V) appropriately to bias U402 (AD812). These benchtop linear supplies should each have 100 mA of current capability. To view the CWD2+/CWD2. through CWD5+/CWD5. outputs, jumper together the appropriate outputs on P606 and P607. All outputs are summed together on the IOP and ION buses, fed to a 1:4 impedance ratio transformer, and buffered so that the user can view the output on a spectrum analyzer. This can be configured to be viewed in single-ended mode (default) or in differential mode by using a spectrum analyzer. To set the voltage for the appropriate number of channels to be summed, change the value of R447 and R448 on the primary transformer (T402). Upon shipment, the CWD0+/CWD0., CWD1+/CWD1., CWD6+/CWD6., and CWD7+/CWD7. outputs are properly biased and ready to use with the AD8339 quad I/Q demodulator and phase shifter. The AD9272/AD9273 evaluation board simply snaps into place on the AD8339 evaluation board (AD8339- EVALZ). Remove the jumpers connected to P3A and P4A on the AD8339 evaluation board, and snap the standoffs that are provided with the AD9272/AD9273 into the AD8339 evaluation board standoff holes in the center of the board. The standoffs will automatically lock into place and create a direct connection between the AD9272/AD9273 CWDx± outputs and the AD8339 inputs. DOUTx+, DOUTx. If an alternative data capture method to the setup described in Figure 2 is used, optional receiver terminations, R701 to R710, can be installed next to the high speed backplane connector. EXPAND DISPLAY BUTTON EVALUATION BOARD SOFTWARE QUICK START PROCEDURES This section provides quick start procedures for using the AD9272/ AD9273 either on the evaluation board or in a system level design. Both the default and optional settings are described. CONFIGURING THE BOARD Before using the software for testing, configure the evaluation board as follows: 1. Connect the evaluation board to the data capture board as shown in Figure 1 and Figure 2. 2. Connect one 6 V, 2.5 A switching power supply (such as the CUI Inc. EPS060250UH-PHP-SZ supplied) to the AD9272/AD9273 board. 3. Connect one 6 V, 2.5 A switching power supply (such as the CUI EPS060250UH-PHP-SZ supplied) to the HSC- ADC-EVALCZ board. 4. Connect the HSC-ADC-EVALCZ board (J6) to the PC with a USB cable. 5. On the ADC evaluation board, place jumpers on all four pin pairs of J601 to connect the SPI bus. 6. On the ADC evaluation board, ensure that J401 (OSC_EN) is jumpered to the on setting to use the on-board 50 MHz/ 65 MHz/80 MHz Valpey Fisher VFAC3 oscillator. 7. On the ADC evaluation board, use a clean signal generator with low phase noise to provide an input signal to the desired channel. Use a 1 m, shielded, RG-58, 50 . coaxial cable to connect the signal generator. For best results, use a narrow-band band-pass filter with 50 . terminations and an appropriate center frequency. (Analog Devices uses TTE, Allen Avionics, and K&L band-pass filters.) USING THE SOFTWARE FOR TESTING Setting Up the ADC Data Capture Block After configuring the board, set up the ADC data capture block using the following steps: 1. Open VisualAnalog™ on a PC. AD9272 or AD9273 should be listed in the status ba...

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