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Anleitung LG, modell 49UH750V

Hersteller: LG
Dateigröße: 11.04 mb
Dateiname:
Unterrichtssprache:itendeda
Fotos und technische Daten  LG  49UH750V
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Dieses Gerät hat auch andere Anweisungen:
Fernseher - 49UH750V (770.53 kb)

Anleitung Zusammenfassung


PAGE 2
TP204
DATA_FORMAT_1
TP203
DATA_FORMAT_0
M16 HW Model Option
+3.3V_NORMAL
EAN63846302
IC101
FE_DEMOD1_TS_CLK
LGE1312(M16)
FE_DEMOD1_TS_SYNC
FE_DEMOD1_TS_VAL
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
FE_DEMOD1_TS_ERROR
10K
10K
10K
10K
10K
10K
AC27
AM10
V16
TP_DVB_CLK
GPIO0
BIT[10]
RGBW
AD27
AK17
BIT0_1
BIT1_1
BIT2_1
BIT3_1
BIT4_1
FE_DEMOD1_TS_DATA[0-7]
BIT5_1
BIT6_1
BIT7_1
BIT9_1
TP_DVB_SOP
GPIO1
BIT[9]
BIT8_1
DDR1.5GB
BIT10_1
AC29
AJ7
15Y_TUNER
R225
R226
R227
R228
R229
R230
R231
R232
R241
R242
R243
R244
R245
R254
R276
R277
TP_DVB_VAL
GPIO2
BIT[8]
AC28
AH16
TP_DVB_ERR
GPIO3
BIT[7]
BIT[0]
HDMI_EXT_EDID
FE_DEMOD1_TS_DATA[7]
AF29
AJ17
TP_DVB_DATA7
GPIO4
BIT[6]
FE_DEMOD1_TS_DATA[6]
AF28
AK9
BIT[1]
TP_DVB_DATA6
GPIO5
BIT[5]
FE_DEMOD1_TS_DATA[5]
AG29
AH15
TP_DVB_DATA5
GPIO6
BIT[4]
FE_DEMOD1_TS_DATA[4]
AG28
AJ16
TP_DVB_DATA4
GPIO7
BIT[3]
FE_DEMOD1_TS_DATA[3]
AE28
AH21
BIT[2]
TP_DVB_DATA3
GPIO8
BIT[2]
FE_DEMOD1_TS_DATA[2]
AE27
AH5
TP_DVB_DATA2
GPIO9
BIT[1]
BIT[3]
FE_DEMOD1_TS_DATA[1]
AD29
AJ8
TP_DVB_DATA1
GPIO10
OTP_WRITE
FE_DEMOD1_TS_DATA[0]
AD28
AJ18
TP_DVB_DATA0
GPIO11
AV1_CVBS_DET
AK18
GPIO12
COMP2_DET
BIT[4]
TPI_DATA[0-7]
A27
AJ9
TPI_CLK
TPI_CLK
GPIO13
CORE_VID[1]
Designated GPIO
C26
AH6
for OLED
BIT[5]
TPI_SOP
TPI_SOP
GPIO14
BIT[0]
B26
AH20
TPI_VAL
TPI_VAL
GPIO15
MODEL_OPT_14
QSM_EN
BIT[6]
C27
AH7
TPI_ERR
TPI_ERR
GPIO16
ON_RF_DONE
TPI_DATA[0]
DATA_FORMAT_1
B25
AK6
TPI_ERR
TPI_DATA0
GPIO17
MODEL_OPT_11
TP201
TPI_DATA[1]
B27
AA7
TPI_DATA1
LED_SCL GPIO18
RETENTION_DISABLE
BIT[7]
TPI_DATA[2]
C25
AB6
TPO_ERR
TP202
TPI_DATA2
LED_SDA GPIO19
INSTANT_BOOT
TPI_DATA[3]
A25
AJ6
BIT[8]
TPI_DATA3
GPIO20
DEBUG
TPI_DATA[4]
B29
AK5
TPI_DATA4
GPIO21
COMPENSATION_DONE
TPI_DATA[5]
R280
100
DATA_FORMAT_0
C28
AF7
TPI_DATA5
UART_RX GPIO22
HP_DET
R274
Near AMP
BIT[9]
TPI_DATA[6]
100
B28
AJ5
HP_OUT
TPI_DATA6
UART_TX GPIO23
TPI_DATA[7]
A28
AJ15
C225
BIT[10]
1/16W
TPI_DATA7
GPIO24
BT_RESET
1000pF
AMP_RESET_N
AJ14
5%
GPIO25
50V
/TU_RESET2
2AMP
TPO_DATA[0-7]
K28
AK15
2.4K
R273
TPO_CLK
TPIO_CLK
GPIO26
/TU_RESET1
L28
AK14
TPO_SOP
TPIO_SOP
GPIO27
TCON_I2C_EN
M28
AH14
MODEL_OPT_11
TPO_VAL
TPIO_VAL
GPIO28
MODEL_OPT_13
L29
AK8
TPO_ERR
TPIO_ERR
GPIO29
/RST_PHY
TPO_DATA[0]
N28
AH17
MODEL_OPT_12
TPIO_DATA0
GPIO30
MODEL_OPT_15
OLED_TCON_FW
TPO_DATA[1]
R273-*1
4.7K
M29
AG7
1AMP
TPIO_DATA1
GPIO31
CORE_VID[0]
TPO_DATA[2]
M30
MODEL_OPT_13
TPIO_DATA2
TPO_DATA[3]
L30
AN3
TPIO_DATA3
TX0N
TXA_0P/VX1_0P_SOC
TPO_DATA[4]
K29
AN4
MODEL_OPT_14
TPIO_DATA4
TX0P
TXA_0N/VX1_0N_SOC
TPO_DATA[5]
J29
AM3
TPIO_DATA5
TX1N
TXA_1P/VX1_1P_SOC
TPO_DATA[6]
J30
AM4
MODEL_OPT_15
TPIO_DATA6
TX1P
TXA_1N/VX1_1N_SOC
TPO_DATA[7]
H30
AM1
TPIO_DATA7
TX2N
TXA_2P/VX1_2P_SOC
AM2
TX2P
TXA_2N/VX1_2N_SOC
AJ31
AL3
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
FE_DEMOD2_TS_CLK
FE_DEMOD2_TS_CLK
STPI0_CLK
TX3N
TXA_CLKP/VX1_3P_SOC
AK30
AL4
FE_DEMOD2_TS_SYNC
FE_DEMOD2_TS_SYNC
STPI0_SOP
TX3P
TXA_CLKN/VX1_3N_SOC
DDR2GB
AH31
AK3
RGB
V15
FE_DEMOD2_TS_VAL
FE_DEMOD2_TS_VAL
STPI0_VAL
TX4N
TXA_3P/VX1_4P_SOC
AH30
AK4
BIT0_0
BIT1_0
BIT2_0
BIT3_0
BIT4_0
BIT5_0
BIT6_0
BIT7_0
BIT8_0
BIT9_0
FE_DEMOD2_TS_ERROR
FE_DEMOD2_TS_ERROR
STPI0_ERR
TX4P
TXA_3N/VX1_4N_SOC
BIT10_0
R233
R234
R235
R236
R237
R238
R239
R240
R249
R250
R251
HDMI_INT_EDID
R252
R253
R246
R278
R279
AK27
AK1
16Y_TUNER
FE_DEMOD2_TS_DATA
FE_DEMOD2_TS_DATA
STPI0_DATA0
TX5N
TXA_4P/VX1_5P_SOC
AJ27
AK2
FE_DEMOD2_TS_DATA[1]
FE_DEMOD2_TS_DATA[1]
STPI0_DATA1
TX5P
TXA_4N/VX1_5N_SOC
AJ28
AJ3
FE_DEMOD2_TS_DATA[2]
FE_DEMOD2_TS_DATA[2]
STPI0_DATA2
TX6N
TXB_0P/VX1_6P_SOC
AH28
AJ4
FE_DEMOD2_TS_DATA[3]
FE_DEMOD2_TS_DATA[3]
STPI0_DATA3
TX6P
TXB_0N/VX1_6N_SOC
AK29
AH3
FE_DEMOD2_TS_DATA[4]
FE_DEMOD2_TS_DATA[4]
STPI0_DATA4
TX7N
TXB_1P/VX1_7P_SOC
AJ29
AH4
FE_DEMOD2_TS_DATA[5]
FE_DEMOD2_TS_DATA[5]
STPI0_DATA5
TX7P
TXB_1N/VX1_7N_SOC
AH29
AH1
FE_DEMOD2_TS_DATA[6]
FE_DEMOD2_TS_DATA[6]
STPI0_DATA6
TX8N
TXB_2P/VX1_8P_SOC
AJ30
AH2
FE_DEMOD2_TS_DATA[7]
FE_DEMOD2_TS_DATA[7]
STPI0_DATA7
TX8P
TXB_2N/VX1_8N_SOC
AG3
TX9N
TXB_CLKP/VX1_9P_SOC
AK26
AG4
FE_DEMOD3_TS_CLK
FE_DEMOD3_TS_CLK
STPI1_CLK
TX9P
TXB_CLKN/VX1_9N_SOC
AH25
AF3
FE_DEMOD3_TS_SYNC
FE_DEMOD3_TS_SYNC
STPI1_SOP
TX10N
TXB_3P/VX1_10P_SOC
TXB_3P/VX1_10P_SOC
AH26
AF4
FE_DEMOD3_TS_VAL
FE_DEMOD3_TS_VAL
STPI1_VAL
TX10P
TXB_3N/VX1_10N_SOC
TXB_3N/VX1_10N_SOC
AJ25
AF1
FE_DEMOD3_TS_ERROR
FE_DEMOD3_TS_ERROR
STPI1_ERR
TX11N
TXB_4P/VX1_11P_SOC
TXB_4P/VX1_11P_SOC
AJ26
AF2
FE_DEMOD3_TS_DATA
FE_DEMOD3_TS_DATA
STPI1_DATA
TX11P
TXB_4N/VX1_11N_SOC
TXB_4N/VX1_11N_SOC
AD3
AE3
EPI_SOE
TX_LOCKN
Vx1_LOCK_N
AD1
EPI_MCLK
EPI_MCLK
EPI_MCLK
AD4
EPI_GCLK
EPI_GCLK
EPI_GCLK
AD2
EPI_EO
EPI_EO
EPI_EO
AC4
EPI_VST
EPI_VST
EPI_VST
BIT 2/3 : TUNER OPTION
BIT 4/5/6 : BACK-END OPTION
BIT 0/1 : AREA OPTION
BIT[4/5/6]
DISPLAY TYPE
FHD/UHD
TYPE
COMMENT
BIT [0/1]
DVB
ATSC
JP
BIT(2/3)
EU/CIS
AJJA
TW/COL
CN/HK
KR
N.America
BR
JP
0 / 0 / 0
LCD
UHD
VBY1
M16+F16 / M16 VX1
TAIWAN/COLOM)
T2/C/S2 PIP
T
T2/C PIP
0 / 0
N/AMERICA
ATSC+T2
ISDB PIP
0/0
EXT_ATV
INT_ATV
Default
EXT_ATV
EXT_ATV
EXT_ATV
INT_ATV
EXT_ATV
0 / 0 / 1
LCD
UHD
EPI
M16 EPI
0 / 1
CHINA/HONGKONG
KOREA
JAPAN
T2
0/1
T2/C/S2
T2/C/S2
ISDB
INT_ATV
ATSC+T2
EXT_ATV
EXT_ATV
0 / 1 / 0
INT_ATV
INT_ATV
EXT_ATV
RESERVED
1 / 0
EU/CIS
S/AMERICA
INT_ATV
T2
T2C/S2
T2/C/S2
0 / 1 / 1
RESERVED
ATSC+T2
ISDB
1 / 1
ASIA/AFRICA
Sri Lanka
1/0
INT_ATV
EXT_ATV
EXT_ATV
EXT_ATV
INT_ATV
1 / 0 / 0
OLED
UHD
VBY1
T2
-
1/1
EXT_ATV
1 / 0 / 1
RESERVED
1 / 1 / 0
OLED
FHD
VBY1
-
1 / 1 / 1
RESERVED
BIT 7/8 : DDR Vender
BIT 9/10 : FRC
UART 1 / 2
BIT(7/8)
DDR vender
BIT(9/10)
FRC
00
HYNIX
00
M16 ONLY
+3.3V_NORMAL
01
SAMSUNG
01
M16+F16
DEBUG_UART
MODEL OPTION
10
MICRON
10
P202
11
11
Low
High
12507WS-04L
+3.3V_NORMAL
MODEL_OPT_11
HDMI
HDMI_INT_EDID
HDMI_EXT_EDID
EEPROM
+3.3V_NORMAL
1
MODEL_OPT_12
MLE_M+
RGB
RGBW
R269
10K
UART_RX_PULL_UP
MODEL_OPT_13
TUNER TYPE
16Y TUNER
15Y TUNER
UART_RX_PULL_UP
UART1_RX
R265
22
2
3.3K
OPT
R270
MODEL_OPT_14
DDR SIZE
DDR2GB
DDR1.5GB
3
MODEL_OPT_15
MODULE
V15
V16
22
R267
22
DEBUG
R210
4
UART1_TX
DEBUG_UART
R206
27K
DEBUG_LED
GND JIG POINT (5pi)
5
1
2
For ISP
G
R
DEBUG_LED
3
4
LD201
JP200
JP201
JP202
JP203
LTST-C155KGJRKT
220
R208
DEBUG_LED
E
Q201
MMBT3906(NXP)
Vx1_LOCK_N
B
DEBUG_LED
C
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FIRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
M16
2015.11.23
ESSENTIAL THAT ONLY MANUFACTURES SPECIFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
M16 Symbol B
2
99
Copyright ⓒ 2016 LG Electronics. Inc. All right reserved.
LGE Internal Use Only
Only for training and service purposes


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