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3. Write to 30-second ADJ bit The 30-seconds ADJ function is enabled by writing 1 to the 30-seconds ADJ bit. Note that the counter registers (S1 to W) cannot be accessed for 76.3 .s after this write. Therefore, follow one of the procedures shown below to use this function. START END 30 s ADJ bit < 1 Read the 30 s ADJ bit Wait 76.3 .s NO YES 30 s ADJ bit=0? or START END 30 s ADJ bit < 1 Read the 30 s ADJ bit NO YES 30 s ADJ bit=0? Note The crystal unit could be damaged if subjected to excessive shock. If the crystal unit should stop operating for such a reason, the timer within the RTC will stop. While the crystal unit is operating, the BUSY bit is automatically reset every 190 .s and the 30seconds ADJ bit, every 76.3 .s , but this automatic reset cannot be done if the oscillation stops. Therefore, in such a status, it is no longer possible to escape from the BUSY bit status check loop shown in subsection 2 above or the 30-seconds ADJ bit status check loop shown in subsection 3 above, and you should consider backing up the system. To design a fail-safe system, provide an escape from the loop to a procedure that can process such an error if the loop is repeated for more than 0.5 ms to 1.0 ms. Page - 16 MQ - 162 - 03 RTC - 72421 / 72423 4. Using the CS1 pin The RTC-72421/RTC-72423 has 2 chip-select signal systems: CS0 and CS1. Use CS0 as chip-select for ordinary bus access. CS1 is not only used for CPU bus control, it also has the main function of switching between standby mode and operating mode. (1) Functions Providing the CS1 pin with the rated voltage levels enables CS1 to have the following functions: • Enabling interface with microprocessor during operation within the operating voltage range (5.0 V ±0.5 V) • Reducing current consumption during standby (to prevent through currents caused by unstable inputs, which is inherent to C-MOS devices) • Protecting internal data during standby To ensure these functions, make sure that operation of the CS1 pins observes that following conditions: • Make sure that the voltage input to the CS1 pin during operation is at least 4/5 VDD. • Make sure that the voltage input to the CS1 pin during standby is as close as possible to 0 V, to prevent through currents. • Make sure that the operation conforms to the timing chart below during a shift to standby mode or a return to operating mode. * Standby mode is a state in which a voltage lower than the RTC's rated range of operating supply voltage is applied (4.5 V to 2.0 V). Under this condition, the timer continues to operate under battery back-up power, but the interface between the interior and exterior of the RTC cannot be guaranteed. (2) Timing Voltage detection circuit RTC VDD CS1 GND Ceramic capacitor of 0.01 .F to 0.1 .F +5 V Note1 Note2 + Shift to standby mode Return to operation mode Data hold mode VIH2 (4/5 VDD) VIL2 (1/5 VDD) tCDR 2 .s Min. tR 4 V 4 V Must be at least 2.0V Must be at no more than 1/5VDD 2 .s Min. Do not access the RTC while the voltage at CS1 is changing. (3) Note If the RTC is operated with timing conditions different from those shown above, data within the RTC could be overwritten during a shift to standby mode or a return to operating mode. For example, if a write signal (WR) is generated during either of the timing conditions (tCDR, tR) shown in the timing chart above, the data will be input before the RTC has stabilized. To ensure that data is held throughout the entire standby process, make sure that the timing conditions shown in the chart are followed. .. Power supply circuit example Note 1:This capacitor must be of a high capacity because a transient reverse current flows from the collector to the emitter of the transistor when the power is turned off. Note 2:Use a chargeable or lithium battery. If a chargeable battery is used, there is no need for the diode. If a lithium battery is used, the diode is necessary. For specific details of the resistance of the resistor, contact the manufacturer of the battery that is used. Page - 17 MQ - 162 - 03 RTC - 72421 / 72423 .. Examples of connection to general-purpose microprocessor When connecting the RTC-72421/RTC-72423 to a microprocessor, carefully check the AC timings of both the RTC and the microprocessor. 1. Connection to multiplexed bus type 8085/MCS48,51 RTC-72421/3 8085/MCS48,51 RTC-72421/3 AD3 AD2 AD1 AD0 IO/M ALE RD WR Decoder A3 A2 A1 A0 D3 D2 D1 D0 CS0 ALE RD WR Upper address bus AD3 AD2 AD1 AD0 Upper address bus IO/M ALE RD WR Decoder A3 A2 A1 A0 D3 D2 D1 D0 CS0 ALE RD WR Latch The resistors on the RD and WR lines are not necessary if the CPU does not have a HALT or HOLD state. 2. Connection to Z80 or compatible CPU Z80, SMC84C00AC RTC-72421/3 A3 A2 A1 A0 Upper address bus RD WR Decoder A3 A2 A1 A0 D3 D2 D1 D0 CS0 ALE RD WR D3 D2 D1 D0 IORQ MEMRQ or *Select IORQ or MEMRQ depending on whether the RTC maps I/O or memory of the CPU. 3. Connection to 68-series MPU A3 A2 A1 A0 Upper address bus R/W E Decoder A3 A2 A1 A0 D3 D2 D1 D0 CS0 ALE ...

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