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Anleitung Zusammenfassung
1 24 RETI return from int. 1 24 AJMP addr11 jump 2 24 LJMP addr16 3 24 SJMP rel 2 24 JMP @A+DPTR 1 24 JZ rel jump if A = 0 2 24 JNZ rel jump if A not 0 2 24 CJNE A,direct,rel compare andjump if notequal 3 24 CJNE A,#data,rel 3 24 CJNE Rn,#data,rel 3 24 CJNE @Ri,#data,rel 3 24 DJNZ Rn,rel decrement and jump if not zero 2 24 DJNZ direct, rel 3 24 NOP no operation 1 12 CLR C clear bit to zero 1 12 CLR bit 2 12 SETB C set bit to one 1 12 SETB bit 2 12 CPL C complement bit 1 12 CPL bit 2 12 ANL C,bit AND bit with C ...NOTbit with C 2 24 ANL C,/bit 2 24 ORL C,bit OR bit with C ...NOTbit with C 2 24 ORL C,/bit 2 24 MOV C,bit move bit to bit 2 12 MOV bit,C 2 24 JC rel jump if C set 2 24 JNC rel jmp if C not set 2 24 JB bit,rel jump if bit set 3 24 JNB bit,rel jmp if bit not set 3 24 JBC bit, rel jmp&clear if set 3 24 (256 counts per oC) 200.A / 400.A AIN MUX 16bit counter timers DAC controlADC control & calibration DAC OSC & PLL bandgapreference TEMP sensor time interval counter VREF detect AIN MUX ADC control & calibration 24 bit SD ADC (primary ADC) (auxillary ADC) 16 bit SD ADC power supplymonitor synchronousserial interface (SPI) 8K x 8 program Flash/EE 640 x 8 data Flash/EE watchdogtimer 256 x 8 user RAM asynchronousserial port (UART) 8052 MCU core downloader debugger PGABUF BUF single-pinemulator ADuC824 9 10 11 12 8 7 2 1 23 22 3 2627143233 25242322191817163938373631302928121110943215251504946454443 42414015 181956203435472148133 4 1617 4 18 19 26 27 DAC T0 T1 T2 T2EX AIN5 REFIN+ REFIN INTERRUPT VECTOR ADDRESSES InterruptBit Interrupt Name Vector Address Prioritywithin Level PSMCON.5 Power Supply Monitor Interrupt 43h 1 WDS WatchDog Timer Interrupt 5Bh 2 IE0 External Interrupt 0 03h 3 RDY0/RDY1 End of ADC Conversion Interrupt 33h 4 TF0 Timer0 Overflow Interrupt 0Bh 5 IE1 External Interrupt 1 13h 6 TF1 Timer1 Overflow Interrupt 1Bh 7 ISPI SPI Interrupt 3Bh 8 RI/TI UART Interrupt 23h 9 TF2/EXF2 Timer2 Interrupt 2Bh 10 TIMECON.2 Time Interval Counter Interrupt 53h 11 INT0 INT0INT0INT1 INT1INT1 ASSEMBLER DIRECTIVES IEXC1 D0 IEXC2 EQU define symbol DW store word values in program memory DATA define internal memory symbol ORG set segment location counter IDATA define indirect addressing symbol END end of assembly source file XDATA define external memory symbol CSEG select program memory space BIT define internal bit memory symbol XSEG select external data memory space CODE define program memory symbol DSEG select internal data memory space DS reserve bytes of data memory ISEG select indirectly addressed internal DBIT reserve bits of bit memory data memory space DB store byte values in program memory BSEG select bit addressable memory space D1 AVDD AGND DVDD DGND RxD TxD ALE PSEN EA RESET SCLOCKMOSI MISO SS XTAL1 XTAL2 REV. A SFR DESCRIPTIONS DATA MEMORY: RAM, SFRs, user Flash/EE (all read/write) SFR MAP & RESET VALUES decimaladdress HEXaddress LOWER RAM 127 7Fh General Purpose Area (bit addresses)MSBaddressLSBaddress... ... 48 30h 47 2Fh Bit Addressable Area 7Fh 7Eh 7Dh 7Ch 7Bh 7Ah 79h 78h 46 2Eh 77h 76h 75h 74h 73h 72h 71h 70h 45 2Dh 6Fh 6Eh 6Dh 6Ch 6Bh 6Ah 69h 68h 44 2Ch 67h 66h 65h 64h 63h 62h 61h 60h 43 2Bh 5Fh 5Eh 5Dh 5Ch 5Bh 5Ah 59h 58h 42 2Ah 57h 56h 55h 54h 53h 52h 51h 50h 41 29h 4Fh 4Eh 4Dh 4Ch 4Bh 4Ah 49h 48h 40 28h 47h 46h 45h 44h 43h 42h 41h 40h 39 27h 3Fh 3Eh 3Dh 3Ch 3Bh 3Ah 39h 38h 38 26h 37h 36h 35h 34h 33h 32h 31h 30h 37 25h 2Fh 2Eh 2Dh 2Ch 2Bh 2Ah 29h 28h 36 24h 27h 26h 25h 24h 23h 22g 21h 20h 35 23h 1Fh 1Eh 1Dh 1Ch 1Bh 1Ah 19h 18h 34 22h 17h 16h 15h 14h 13h 12h 11g 10h 33 21h 0Fh 0Eh 0Dh 0Ch 0Bh 0Ah 09h 08h 32 20h 07h 06h 05h 04h 03h 02h 01h 00h 31 1Fh R7 Register Bank 3 SFRs (directaddressingonly) 128 bytesupper RAM(indirectaddressingonly) 128 byteslower RAM (direct orindirect addressing) 640 bytes(160 pages) data Flash/EE(accessiblethroughSFRs) external data memory (16MEGaddressable) 00h 000000h FFFFFFh FFh 9Fh 00h ( page 0 ) ( page 159 ) DATA MEMORY SPACE (read/write area) 30 1Eh R6 29 1Dh R5 28 1Ch R4 27 1Bh R3 26 1Ah R2 25 19h R1 24 18h R0 23 17h R7 Register Bank 2 22 16h R6 21 15h R5 20 14h R4 19 13h R3 18 12h R2 17 11h R1 16 10h R0 15 0Fh R7 Register Bank 1 14 0Eh R6 13 0Dh R5 12 0Ch R4 11 0Bh R3 10 0Ah R2 9 09h R1 8 08h R0 7 07h R7 Register Bank 0 6 06h R6 5 05h R5 4 04h R4 3 03h R3 2 02h R2 1 01h R1 0 00h R0 (reserved)(reserved) (reserved) (reserved) (reserved) (reserved)(reserved) (reserved) (reserved)(reserved) (reserved) (reserved) (reserved) (reserved) (reserved) (reserved)(reserved) (reserved)(reserved) (reserved) (reserved) (reserved) (reserved) (reserved) (reserved) (reserved) (reserved) F0h 0 IT088h 0 80h 1 F1h 0F2h 0F3h 0F4h 0F5h 0F6h 0F7h 0 (not used)(not used)(not used)(not used) (not used)(not used) (not used)(not used) (not used)(not used) (not used) (not used) (not used) (not used) (not used) (not used) (not used) (not used) (re...